Circuit arrangement for avoiding switching losses in a pair of branches of a self-commutated converter having an impressed DC intermediate circuit (link) voltage

摘要

The transistors used in self-commutated converters having an impressed DC intermediate circuit voltage, or other electronic switches which can be turned on and off, and also the diodes have undesired switching losses. The known circuits for reducing or avoiding the said losses manifest other disadvantages such as, in particular, situations in which the said power semiconductors are loaded with additional currents or (over)voltages. The circuit arrangement according to the invention fundamentally avoids all switching losses without the situation arising in which the said power semiconductors are loaded with additional currents or (over)voltages. In addition, the rate of change of the output voltage is advantageously reduced. For this purpose, a first electrical two-terminal network (100), which comprises a capacitor (101), and at least one other electrical two-terminal network (112), which comprises the series circuit formed by an inductor (113) and an electronic switch (114), are connected between the output terminal (2) and the centre tap (3) of the DC intermediate circuit voltage source (1). Applications are provided, in particular, in the case of pulse-controlled inverters for feeding three-phase drives or in the case of power supplies. <IMAGE>