| 摘要 |
An EEPROM cell has a first MOS transistor formed in a semiconductor substrate 1 of a first conductivity type and having current conducting regions 2a, 2b of a second conductivity type and a gate electrode 3, a well 4 of a second conductivity type provided in the substrate, a plate electrode 7 formed on the well with an insulating layer interposed therebetween, and at least one region 5 of the first conductivity type formed in the well adjacent to the plate electrode. The gate electrode and the plate electrode are connected in common and act as a floating gate 8. The well acts as a control gate. The EEPROM cell can be manufactured with ease by the standard CMOS process. <IMAGE> |
