发明名称 |
Method for forming a multi-layer metallic wiring structure |
摘要 |
After accumulating a BPSG film layer on a silicon substrate, a first Al-Si-Cu film layer, a W film layer and a second Al-Si-Cu film layer are successively accumulated on this BPSG film layer. A resist pattern with wide-width and narrow-width pattern portions is formed on the second Al-Si-Cu film layer. The wide-width pattern portion is provided at a position corresponding to a contact for connecting a first-layer metallic wiring and a second-layer metallic wiring, while the narrow-width pattern portion is provided at a position corresponding to a wiring portion for the first-layer metallic wiring. After applying first etching on the second Al-Si-Cu film layer with a mask of the resist patter, second etching is applied on the W film layer. Thereafter, by applying third etching, the resist pattern remaining on the first-layer metallic wiring is removed and the first Al-Si-Cu film layer is transfigured into a tall metallic film portion and a short metallic film portion. After accumulating an inter-layer insulating film layer on the first Al-Si-Cu film layer, etchback is applied on this inter-layer insulating film layer until the top of the tall metallic film portion is bared. Then, the second-layer metallic wiring is formed on the inter-layer insulating film layer so that the second-layer metallic wiring is connected with the tall metallic film portion.
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申请公布号 |
US5385867(A) |
申请公布日期 |
1995.01.31 |
申请号 |
US19940216968 |
申请日期 |
1994.03.24 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
UEDA, TETSUYA;YANO, KOUSAKU;MURAKAMI, TOMOYASU;YAMANAKA, MICHINARI;HIRAO, SHUJI;NOMURA, NOBORU |
分类号 |
H01L21/3205;H01L21/768;H01L23/522;(IPC1-7):H01L21/283;H01L21/31 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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