| 摘要 |
PURPOSE:To eliminate deterioration of the substantial retrieving speed when the memory data are not normal and also to eliminate the dependence on the abnormality occurrence frequency of the memory data by reading out at all times the memory data by a reading modified writing operation based on the program given from a subroutine program memory of a CPU and regardless of the presence or absence of the abnormality of data. CONSTITUTION:An ECC circuit 4 which verifies the data stored in a memory 3 is placed between a CPU 1 and the memory 3. A memory operation control mechanism functions to quickly write again the data which are verified and corrected by the circuit 4 based on the program given from a subroutine program memory 5 of the CPU 1 and regardless of the presence or absence of the abnormality of the memory data. Thus it is possible to retrieve the memory 3 by repeating a basic operation cycle and requiring no dependence on the abnormality occurrence frequency of data stored in a memory device. |
