| 摘要 |
PURPOSE:To increase a capture range and a lock range by filtering a signal inputted to a phase comparator in a phase synchronizing loop circuit. CONSTITUTION:In the phase synthesizing loop circuit PLL1, an input signal B1 is mixed with a signal outputted from a voltage control type, oscillator VCO1 by a multiplier FC1 to convert its frequency, a high frequency component is removed from the mixed signal by a low pass filter LPF1, a signal outputted through the LPF1 is adjusted at its level by an automatic gain control type amplifier AGC1, and the level-adjusted signal is inputted to a power synthesizer 52 as a signal C1. The output signal of the LPF1 is also applied to a comb filter KFI and an output from the KF1 is applied to a phase comparator PC1. The PCI compares the phase of the signal outputted from the KF1 with that of a reference signal. An output signal from the PC1 is converted into controlled voltage by a loop filter LF1 and the control voltage is applied to the oscillator VCO1. |
