发明名称 Steuerbare Maximallängen- Linearwiederholungsfolgegeneratoranordnung
摘要 A control circuit such as a microcomputer sets only the starting address of the memory in which initial information for generating a maximum length recurring sequence is stored and the number of chips of the maximum length recurring sequence and the initial information for generating a maximum length recurring sequence is set from the memory in the maximum length recurring sequence generator by a hardware. The hardware for accessing the memory is constructed by a counter working with a high speed clock. The number of chips of the maximum length recurring sequence set by the external control circuit is counted by a counter working with a high speed clock.
申请公布号 DE3722906(C2) 申请公布日期 1995.01.26
申请号 DE19873722906 申请日期 1987.07.10
申请人 CLARION CO., LTD., TOKIO/TOKYO, JP 发明人 KURIHARA, TAKAO, TOKIO/TOKYO, JP;HAMATSU, MASAHIRO, TOKIO/TOKYO, JP
分类号 H04B1/707;H04J13/00;H04J13/10;H04L9/22 主分类号 H04B1/707
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