A synchronous dynamic memory.

摘要

The invention relates to a synchronous dynamic random access memory integrated circuit comprising a memory block including a plurality of memory cells for storing information, an input for receiving an external clock signal, an address input means for receiving a first address and a second address defining a location of information stored in said memory block, said address input means providing said first address as an output in response to a first edge of said external clock signal, said address input means providing said second address as an output in response to a second edge of said external clock signal, said first edge of said external clock signal being different from said second edge of said second edge of said external clock signal and an access means for accessing a location in said memory block corresponding to said first address and said second address provided by said address input means.