发明名称 Multiport memory device and an operation method thereof
摘要 Memory cell array includes a plurality of 2-port memory cells. A first row address decoder for decoding a first address signal to select a first word line included in any one of a plurality of word line groups, and a second row address decoder for decoding a second address signal to select a second word line included in any one of a plurality of word line groups are provided. A word line driving circuit receives output signals of first and second row address decoders to drive first and second word lines in accordance with a predetermined inhibit condition.
申请公布号 US5384734(A) 申请公布日期 1995.01.24
申请号 US19920956137 申请日期 1992.10.02
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TSUJIHASHI, KUMIKO;TSUJIHASHI, YOSHIKI;SHINOHARA, HIROFUMI
分类号 G11C11/401;G11C8/16;(IPC1-7):G11C7/00 主分类号 G11C11/401
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