发明名称 DISTRIBUTED TIME SYNCHRONIZATION SYSTEM AND METHOD
摘要 A distributed time synchronization system and method synchronizes nodes within a frequency hopping spread spectrum (FHSS) local area network (LAN) group to a virtual master clock value. Each node system of the present invention comprises a CPU, an input device, a display device, a printer or hard copy device, a given amount of RAM and ROM memory, a data storage device, a local clock, a transmitter/receiver, an antenna, a virtual master clock processor, and a common data bus. The method of the present invention comprises the inclusion of a node's local clock value in a message just prior to transmission over the network, storage of a node's local clock value in RAM after an incoming message has been received, and the calculation of the time delay between the sending node and the receiving node by the virtual master clock processor. The virtual master clock processor utilizes this time delay in maintaining a virtual master clock value, which it uses in adjusting the value of the node's local clock at periodic intervals. This synchronizes the receiving node to the virtual master clock value. If the magnitude of the time delay exceeds a maximum allowed value, the magnitude is clamped to the maximum allowed value, thereby maintaining synchronization withing a predetermined tolerance. A node can receive a message transmitted over the FHSS LAN regardless of the message address. Synchronization is therefore maintained without requiring a node to be able to communicate with any specific node within the FHSS LAN group.
申请公布号 WO9502294(A1) 申请公布日期 1995.01.19
申请号 WO1994US07545 申请日期 1994.07.06
申请人 APPLE COMPUTER, INC. 发明人 MINCHER, RICHARD, W.;LYNN, KERRY, E.
分类号 H04J3/06;H04L12/28;(IPC1-7):H04L12/28 主分类号 H04J3/06
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