发明名称 Capacitance multiplier for the internal frequency compensation of switching regulator integrated circuits
摘要 A monolithic switching regulator on chip loop frequency compensation circuit is described. An op-amp is provided with a conventional small frequency compensation capacitor, which determines its unity gain frequency and an input resistor. The op-amp incorporates 100% negative feedback. When driven at a frequency that is below its unity gain frequency the noninverting input of the op-amp displays a capacitance having a value on the order of nanofarads, which value would ordinarily require an excessive chip area if fabricated as an actual capacitor. This capacitance value is useful in the on chip loop frequency compensation of a switching regulator where the switching frequency is operated at about 150 kHZ.
申请公布号 US5382918(A) 申请公布日期 1995.01.17
申请号 US19930013508 申请日期 1993.02.04
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 YAMATAKE, MINEO
分类号 H02M3/00;H03H11/48;(IPC1-7):H03F3/45 主分类号 H02M3/00
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