发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To easily widen a noise removal width and to improve reliability by sampling interruption input signals by clock signals for the plural number of times, inputting the input signals and the output of an oscillation stopping signal holding latch to a gate circuit and outputting the oscillation stopping signals. CONSTITUTION:A sampling circuit 10 performs sampling by the clock signals 7 by using three D flip-flops 11-13 for instance. Thus, the output 18 of the sampling circuit 10 can be asserted only when the sampled interruption input signals 2 are in an asserted state equal to or more than three times. The output 18 of the sampling circuit 10 is reset by the oscillation stopping signal holding latch 3, the output of the oscillation stopping signal holding latch 3 is inputted to the gate circuit 30 and the output of the gate circuit 30 is negated even after the interruption input signals 2 are negated. The output 33 of the gate circuit 30 is connected to the control input of an oscillation circuit 20 and the oscillation circuit 20 continues oscillation. Thus, the noise removal width can be easily and accurately extended and set.</p>
申请公布号 JPH0713655(A) 申请公布日期 1995.01.17
申请号 JP19930158828 申请日期 1993.06.29
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAO YUICHI
分类号 G06F1/04;H03K3/66;(IPC1-7):G06F1/04 主分类号 G06F1/04
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