| 摘要 |
<p>PURPOSE: To provide a data output buffer capable of preventing the influence of a noise at a grounded end at the time of outputting data of logic '0' and outputting exact and stable data. CONSTITUTION: At the time of outputting data of logic '0', a first pull down signal PD1 becomes logic '1' responding to the data DO from a memory cell, a transistor 42 is turned on and an output node 48 is pulled down to logic '0'. Thereafter, when a second pull down signal PD2 outputted from a delay circuit 36 becomes logic '1', the signal PD1 becomes logic '0', the transistor 42 is turned off, a transistor 44 is turned on and the logic '0' of the output node 48 is kept. Even when the voltage of the output node 48 is discharged and the noise at the grounded end is generated by turning on the transistor 42, by properly adjusting a delay time by the delay circuit 36, the transistor 42 is turned off with the good timing and the adverse effect to the output node 48 is prevented. When the transistor 44 is turned on by a resistor R, the adverse effect of the noise at the grounded end is prevented.</p> |
