发明名称 CLOCK REDUNDANCY SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To provide an information processor which prevents the malfunction due to the increase or decrease of oscillation frequency of its oscillator and can improve its reliability by providing a specific number of oscillators which are important for the information processor operating by a clock pulse to secure the redundancy. SOLUTION: This system includes (2n+1) pieces of oscillators which are important for an information processor which operates by a clock pulse. For instance, the clock oscillators (a) 101 to (c) 103 which are triplicated for the redundancy output the clocks of the same frequency as long as no fault occurs. A clock selection instruction circuit 110 outputs an instruction to compare the count value of three counters (a) 107 to (c) 109 with each other and to select the output of the oscillator connected to the counter having the center value in every module. Then the modules 117 and 118 select and use the clocks of the clock oscillators having no faults based on the information given from the circuit 110 even if one of three oscillators (a) 101 to (c) 103 has a fault.</p>
申请公布号 JPH1131022(A) 申请公布日期 1999.02.02
申请号 JP19970202433 申请日期 1997.07.11
申请人 NEC CORP 发明人 WATABE SHINJI
分类号 G06F1/04;G06F1/06;H03K3/02;H03K5/15;(IPC1-7):G06F1/04 主分类号 G06F1/04
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