发明名称 TWO PHASE NON-OVERLAP CLOCK GENERATOR
摘要 The generator comprises a first the duty adjuster for adjusting duty ratio of an input clock for expanding one phase of the input clock, a second adjuster (20) for adjusting the duty ratio of an output pulse of the first duty adjuster for expanding the other phase of the input clock, and non-overlap clock generators (G1-G7) for generating a two phase clock using the output pulse of the second duty adjuster (20).
申请公布号 KR950000351(B1) 申请公布日期 1995.01.13
申请号 KR19920017428 申请日期 1992.09.24
申请人 HYUNDAI ELECTRONICS CO., LTD. 发明人 KANG, KU - CHANG
分类号 H03K19/00;(IPC1-7):H03K19/00 主分类号 H03K19/00
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