发明名称 METHOD AND APPARATUS FOR DETECTION AND CORRECTION OF ERROR IN ATM CELL HEADER
摘要 PURPOSE: To obtain a method and device by which whole power consumption is deduced and the operating frequency of a digital circuit which executes an error detecting and correcting function in an ATM cell header can be lowered with less power consumption. CONSTITUTION: An error detecting and correcting device for ATM cell header provided with a serial-parallel converter 9 which obtains an n-bit parallel data bus 16 from a serial data flow and a frequency divider 8 which divides a serial data clock frequency by (n) so as to generate a parallel data clock is provided with a means 10 which generates syndrome words 20. The syndrome word generating means 10 receives the parallel data bus 16 and, at the same time, an initialization control signal 17 which sets the initial value of the means 10 and the parallel data clock 15 which sets the clock speed of the means 10.
申请公布号 JPH077492(A) 申请公布日期 1995.01.10
申请号 JP19930300683 申请日期 1993.11.30
申请人 ALCATEL NV 发明人 JIYOSE RUISU MERINO GONZARESU;KARUMEN MARIA REKURIKA KABERIYO
分类号 H04L1/00;H04L12/56;H04Q3/00;H04Q11/04;(IPC1-7):H04L1/00;H04L12/28 主分类号 H04L1/00
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