| 摘要 |
The disclosure relates to counters that require the counting to be done under conditions of high security. In such a counter, starting from a number represented by a certain number of bits, the stages of the counter are successively forced, one after the other, to represent the final number in an order such that at no instant do the contents of the counter represent a number smaller than the initial number. A particular structure is used to count very big numbers while, when the technology is of the EEPROM type. This prevents the stage that changes its state most frequently from being subjected to action more than is physically permitted by the technology used. The disclosed method makes it possible, in chip cards, to prevent the diminishing of memorized values representing substantial values which are, for example, monetary values.
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