发明名称 Peak detector circuit and application in a fiber optic receiver
摘要 A peak detector for use in a fiber optic receiver has a capacitor, an input amplifier driving the capacitor, and a feedback differential amplifier coupled between the capacitor and an input of the input amplifier. The input amplifier is a complementary buffer with unity gain modified to include an additional transistor on one rail that receives an inverter voltage generated by the differential amplifier. The inverter voltage equals the difference between twice the capacitor voltage and an input voltage applied to the peak detector. The input amplifier in a positive peak detector functions so that the capacitor voltage tracks the input voltage when it exceeds the inverter voltage, and equals the average of the input voltage and inverter voltage when the input voltage is less than the inverter voltage. A negative peak detector operates similarly but with opposite polarity. The peak detector also contains transistors used to reset the capacitor voltage upon assertion of a reset signal. The input amplifier circuit is also used with slight modification as part of a track-and-hold amplifier. The peak detector circuit works on the principle of counter-balancing the deviation of the input signal from the detected peak value. Thus the advantage of the circuit is that it needs comparatively low gain circuit compared to other approaches. The sample-and-hold or track-and-hold circuit works on the principle of switching the charging current path in a manner similar to a differential amplifier, resulting in very fast switching time.
申请公布号 US5381052(A) 申请公布日期 1995.01.10
申请号 US19930088291 申请日期 1993.07.06
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 KOLTE, RAVINDRA N.
分类号 H03K5/08;(IPC1-7):H03K5/153 主分类号 H03K5/08
代理机构 代理人
主权项
地址