发明名称 SYNCHRONIZATION CONTROLLER AND ITS METHOD
摘要 PURPOSE:To take timing synchronization among plural kinds of data read from a recording medium by providing a master and a slave clock circuit function to each decoder respectively and selecting either of the functions and using the selected function. CONSTITUTION:A system decoder 269 separates a received signal into video data and time information to provide an output of the former to a video buffer 277 and the latter to a system time clock counter (STCC) 279. Moreover, the decoder 269 separates voice data and the time information and the former is outputted to a voice buffer 281 and the latter is outputted to the STCC 283. The video and audio data from the buffers 277, 281 are respectively decoded by image and voice decoders 285, 287 and outputted respectively to image and voice decoders 285, 287. The circuit 289 applies output control and timing control of the video data based on the time information from the STCC 279. Similarly, the circuit 291 implements output control and timing control of the voice data based on the time information from the STCC 283.
申请公布号 JPH077730(A) 申请公布日期 1995.01.10
申请号 JP19940028307 申请日期 1994.02.25
申请人 TOSHIBA CORP 发明人 TANTORII BITSUSHIYUWANATA
分类号 G11B20/10;H04N5/073;H04N7/24;H04N19/00;H04N19/423;H04N19/70 主分类号 G11B20/10
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