| 摘要 |
Dummy patterns are formed in signal patterns of a first metal layer, an insulating film covering such patterns is flattened by CMP, and only dummy patterns are selectively etched by anisotropic etching through holes opened at specific intervals. Then the opened holes are filled with an insulating film, and cavities are formed. In the upper part of the cavity, a signal line of the second metal layer is formed. As a result, a semiconductor device is provided by the CMP flattening technology without being accompanied by increase of parasitic capacity between signal lines by metal dummy patterns or shorting due to dust and the like.
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