发明名称 Semiconductor memory for operation in a plurality of operational modes
摘要 A semiconductor memory includes an instruction decoder, a register for storing operational mode information, a memory core for storing data, and a mode set-up control circuit. The memory operates in a number of modes, such as a read mode, a write mode and a set-up mode. When performing a read or a write command, access information for the command is stored in the register. In order to operate the memory more efficiently, the mode set-up control circuit prestores memory access information. Then, at the end of a read or write command, the prestored access information is loaded into the register. Locally storing the access information prevents the memory from having to wait to receive such information from an external element.
申请公布号 US6487629(B1) 申请公布日期 2002.11.26
申请号 US19990263780 申请日期 1999.03.05
申请人 FUJITSU LIMITED 发明人 SHIBATA HIDETAKA
分类号 G11C11/41;G11C7/10;G11C11/401;G11C11/407;(IPC1-7):G06F12/00 主分类号 G11C11/41
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