| 摘要 |
A processor device (PR), with a segment-oriented physical address formation, is controlled for execution of a system program consisting of a large number of program modules, using segment-specific entry and jump control sequences, in such a way that, in spite of the system program being distributed over several segments when it is compiled, exclusively inter-segment jump instructions can be used. The essential advantage of the invention is that the memory requirement for the program modules can be kept considerably lower than for program modules with inter-segment jump instructions. <IMAGE> |
