发明名称 Synchronous-to-asynchronous converter
摘要 Formatted serial synchronous character data is converted to serial asynchronous data, where the synchronous bit rate varies from the asynchronous intracharacter bit rate. The character data utilizes a start bit-stop bit format which enables the converter to insert stop bits occasionally in proportion to the bit rate difference, thus compensating for bit rate mismatch. The converter offers programmable character lengths of 7, 8, or 9 bits and a possible seven different asynchronous bit rates, each selected by three programmable selection inputs. In addition, the invention uses a total digital design architecture enabling gate array integrated circuit implementation.
申请公布号 US5379327(A) 申请公布日期 1995.01.03
申请号 US19930091305 申请日期 1993.07.13
申请人 MULTI-TECH SYSTEMS, INC. 发明人 SHARMA, RAGHU;JOHNSON, GREG
分类号 H04L5/24;(IPC1-7):H04L23/00 主分类号 H04L5/24
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