| 摘要 |
PCT No. PCT/JP91/00970 Sec. 371 Date 1992 Sec. 102(e) Date May 18, 1992 PCT Filed Jul. 19, 1991 PCT Pub. No. WO92/02043 PCT Pub. Date Feb. 6, 1992.In a semiconductor integrated circuit device such as a memory chip, the number of wirings is increasing as the memory capacity and the like increase. In improving the reliability and obtaining high access speed of a common bus in which these wirings are arranged, wirings in a second layer and via holes at jumpers used for interference portions of signal wirings and power supply wirings in a congested region of a common bus have become an issue. Accordingly, in the present invention, it is made possible to form wirings in the second layer having wide width and a plurality of via holes per one connecting point, thus realizing a semiconductor integrated circuit which has high reliability and high access speed by arranging a mother power supply wiring branched to the common bus line along the vicinity of processing circuits of signal wirings arranged in the common bus.
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