Charge recovery logic including split level logic

摘要

In a pipelined logic circuit, switches are only enabled when voltage differentials across the switches are zero. The switches are configured during a restored state of voltage rails, and a swing in voltage on the rails results in a swing in output voltage to a set level. To restore the logic circuit with minimal energy dissipation and permit useful pipelining, the inputs are regenerated through an inverse logic circuit. The voltage rail then swings back to its restored level. Full forward and reverse pipelines are formed with the individual forward and inverse logic circuits with the pipelines being driven by multiphase clock rails. Each logic stage includes a logic gate and a pass gate.