METHOD AND SYSTEM FOR PROVIDING DATA HOLD TIME BY SYNCHRONOUS RANDOM ACCESS MEMORY DURING WRITE OPERATIONS

摘要

METHOD AND SYSTEM FOR PROVIDING DATA HOLD TIME BY SYNCHRONOUS RANDOM ACCESS MEMORY DURING WRITE OPERATIONS A memory interface on a semiconductor integrated circuit that is used to write data to an external memory upon the clocking of a write strobe signal and that requires data be held valid for a brief time period after the write strobe signal is deasserted. The memory interface enables and disables the semiconductor IC from transferring data to a data bus connected to the external memory upon the assertion and deassertion of the write strobe signal. Data is kept stable on the data bus while the write strobe signal is asserted and allowed to become unstable only after the write strobe signal is deasserted.