| 摘要 |
The process includes the steps of forming an insulating layer (13) on the semiconductor chip (11) having the existing first bond pad (12), forming a via hole (13a) into the layer (13), depositing a conductive metal layer (14), etching the metal layer (14) to form a new pad portion, forming a passivation layer (15) thereon to open a second bond pad (16). The bond pad arranged at any position of upper face of the chip is rearranged to move to any different position without the whole redesign of the chip.
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