发明名称 RECEPTION VOICE SYNTHESIS CIRCUIT IN MULTI-ADDRESS SPEECH RADIO EQUIPMENT
摘要 PURPOSE:To provide a reception voice synthesis circuit from which a noise according to division/synthesis in multi-address speech radio equipment by the super high speed transmission/reception switching of a single frequency can be eliminated and by which a reception tone easy to listen can be received. CONSTITUTION:An IC4 inputs an extended and reproduced reproducing reception tone Lr, and also, inputs a control pulse signal STY synchronized by a synchronizing signal Px from a microcomputer 7, and deletes a signal Lx equivalent to the joining part of the reproducing reception tone Lr for prescribed time tx (around 5% in the whole) setting the signal STY as the output switching of the IC4. Also, this circuit is composed so that the mean voltage level VAV of the reproducing reception tone Lr can be infected instead of the signal Lx equivalent to a deleted joining part by connecting a level injection circuit consisting of a variable resistor VR and a capacitor Cx to the output Y of the IC4.
申请公布号 JPH06350481(A) 申请公布日期 1994.12.22
申请号 JP19930139685 申请日期 1993.06.11
申请人 TOUNO:KK 发明人 TOMARU YUTAKA
分类号 G10L13/00;H04B1/56;H04B1/66;H04B14/00;H04B14/04;H04L5/14;(IPC1-7):H04B1/66;G10L9/00 主分类号 G10L13/00
代理机构 代理人
主权项
地址