发明名称 Methods of forming copper vias with argon sputtering etching in dual damascene processes
摘要 A method of forming a via using a dual damascene process can be provided by forming a via in an insulating layer above a lower level copper interconnect and etching into a surface of the lower level copper interconnect in the via using Argon (Ar) sputtering. Then a trench is formed above a lower portion of the via and an upper level copper interconnect is formed in the lower portion of the via and in the trench using a dual damascene process.
申请公布号 US2007202689(A1) 申请公布日期 2007.08.30
申请号 US20060363070 申请日期 2006.02.27
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHOI SEUNG-MAN;LEE KYOUNG-WOO
分类号 H01L21/4763 主分类号 H01L21/4763
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