| 摘要 |
PURPOSE: To selectively and independently control the leading variation of a binary signal and/or pulse trailing variation. CONSTITUTION: A trailing edge delaying block 1 is in series with a leading edge delay block 2 and a signal input 3 is given to the first stage 20 of a cascade-connected unit delay (Δt) and is also given to the enable terminal E of MUX 5 through a conductor 3'. When the signal input 3 is high, MUX 5 selects and input 1. Switch control SF (O),..., SF (N) controls the delay of a trailing edge. Similarly, the switch control SR (O),...SR (N) controls the delay of a leading edge.
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