| 摘要 |
Novel gate arrays incorporate simple, but ingenious architectural features. A programmable layer of polycrystalline silicon is utilized to improve logic and RAM densities. The programmable layer of polycrystalline silicon is capable of providing electrical connections within a particular logic cell, without requiring the use of electrical interconnections within a dedicated routing channel. This allows increased density of the gate array. By providing programmable polycrystalline silicon, polycrystalline silicon contact connections are placed only where needed, avoiding the need to leave space between adjacent polycrystalline silicon lines for all potential contact connections. |
