| 摘要 |
<p>PURPOSE:To surely detect a 2nd synchronizing signal when synchronization is established based on the result of detection of the 2nd synchronizing signal by correcting a timing to detect the 2nd synchronizing signal SCH based on the result of frequency error detection. CONSTITUTION:A terminal equipment 1 sets a timing of SCH detection based on a result of FCCH timing detection and frequency error detection. Then the equipment 1 stores IQ data obtained by receiving a BCCH in the detection timing set in advance to a RAM, ROM memory circuit 11 and detects the SCH based on the result of comparison between the stored IQ data and a predetermined reference pattern. A timing of SCH detection is switched so as to quicken the SCH detection period when a frequency error is larger by a data processing circuit 5 to correct the timing of SCH detection. Thus, when the SCH is detected, the circuit 5 corrects the entire processing timing based on the SCH thereby establishing synchronization with a base station synchronously with the BCCH.</p> |
