| 发明名称 |
PROCESS AND DEVICE FOR TESTING AN INTEGRATED CIRCUIT SOLDERED ON A BAORD |
| 摘要 |
Test system as well as method for testing for the proper connection of the pins of an IC connected to the circuit tracks of a circuit board, by measurements on parasitic transistors with correction of the detected collector currents in respect of the additional diode-connected parallel transistors in CMOS-IC's.
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| 申请公布号 |
CA2164415(A1) |
申请公布日期 |
1994.12.22 |
| 申请号 |
CA19942164415 |
申请日期 |
1994.06.11 |
| 申请人 |
ITA INGENIEURBUERO FUER TESTAUFGABEN GMBH |
发明人 |
BUKS, MANFRED;HOSSEINI, KARIM |
| 分类号 |
G01R31/26;G01R31/04;H01L21/8238;H01L27/092;(IPC1-7):G01R31/04;G01R31/317;G01R31/319 |
主分类号 |
G01R31/26 |
| 代理机构 |
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代理人 |
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| 主权项 |
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