发明名称 REFERENCE CLOCK SWITCHING CIRCUIT
摘要 <p>PURPOSE:To satisfy standards relating to variation in a clock phase by sharply reducing the phase variation of an output clock from a clock unit. CONSTITUTION:When previously set fixed time has elapsed from the input of a fault generation signal from a fault generation part 11, a normal switching protection time counter 15 informs a switching protection time setting part 17 of the lapse of the time. When minimum time required for the switching of a reference clock has elapsed from the input of the fault generation signal from the detection part 11, a minimum switching protection time counter 16 informs the setting part 17 of the lapse of the time. When a reference clock to be used next had been set up before the generation of the fault, the setting part 17 resets a setting/resetting circuit 18 based upon information from the counter 16. When the circuit 18 is reset, the switching of a selector 19 is controlled to select an output from an N-frequency division counter 13.</p>
申请公布号 JPH06351084(A) 申请公布日期 1994.12.22
申请号 JP19930156296 申请日期 1993.06.02
申请人 NEC CORP 发明人 OGAWA YOSHITO
分类号 G06F1/06;H04Q11/04;(IPC1-7):H04Q11/04 主分类号 G06F1/06
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