| 发明名称 |
Semiconductor memory device incorporating a test mode therein to perform an automatic refresh function. |
| 摘要 |
<p>There is provided a switch (140) between an address line (121) and external output terminals (A0 SIMILAR An), controlled by outputs of a counter circuit (117) and a test mode control circuit (119). The switch (140) transfers a variation of an address signal to external output terminals (A0 SIMILAR An), without connecting the address line (121) with the external address terminals (A0 SIMILAR An), directly. <IMAGE></p> |
| 申请公布号 |
EP0630026(A2) |
申请公布日期 |
1994.12.21 |
| 申请号 |
EP19940109219 |
申请日期 |
1994.06.15 |
| 申请人 |
OKI ELECTRIC INDUSTRY COMPANY, LIMITED |
发明人 |
TAKAHASHI, SHINYA |
| 分类号 |
G11C29/00;G11C11/401;G11C11/406;G11C29/08;G11C29/12;G11C29/18;G11C29/50;(IPC1-7):G11C11/406;G11C11/408 |
主分类号 |
G11C29/00 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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