发明名称 |
Jitter compensating device |
摘要 |
An impulse response of a litter may change in the output of a filter unit immediately after the generation of a litter according to a sampling timing signal from a timing regenerating unit if a filter unit is provided between an A/D converting unit and an echo canceler. In this case, a selecting unit in a jitter compensating unit compensates an uncanceled echo through each of the outputs sequentially selected by a plurality of adaptive filter unit. Plural sets of tap coefficients are stored in a tap coefficient storage unit, from which the selecting unit sequentially reads them to operate one adaptive filter unit, thereby reducing the size of a jitter compensating circuit.
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申请公布号 |
US5375147(A) |
申请公布日期 |
1994.12.20 |
申请号 |
US19920932635 |
申请日期 |
1992.08.20 |
申请人 |
FUJITSU LIMITED |
发明人 |
AWATA, YUTAKA;KAKUISHI, MITSUO;KOIZUMI, NOBUKAZU |
分类号 |
H04B3/23;H04L7/00;H04L7/02;(IPC1-7):H04L7/00 |
主分类号 |
H04B3/23 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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