| 摘要 |
PURPOSE:To use effectively busses to make it possible to reduce registers by changing the information transmission method on busses and changing the information taking-in method in an arithmetic circuit in the double precision floating-point arithmetic. CONSTITUTION:In an arithmetic control unit, upper 32 bits of the first operand on the A bus are caused to enter Q register 14 through multiplexer 13 by a clock, and lower 32 bits on the B bus are caused to enter Q register 22 through multiplexer 21. Next, lower 32 bits of the second operand are transmitted onto the A bus, and lower 32 bits of the second operand are transmitted onto the B bus. Then, contents of Q registers 14 and 22 and contents on the B bus and the A bus are subjected to arithmetic operation in adder and subtractors 16 and 24 by the next clock. |
