| 摘要 |
PURPOSE:To prevent the dead lock of a frequency divider from occurring by discharging a charge/discharge circuit compulsorily via a gate on the discharge path of the charge/discharge circuit corresponding to the reset voltage of a microcomputer or the detection voltage of a detection circuit when a frequency dividing operation is stopped. CONSTITUTION:When the microcomputer is reset first, a reset voltage RST of high level is applied to the control terminal of a transmission gate 9 via an OR gate 16, which forms the discharge path of the charge/discharge circuit. An electric charge accumulated in a capacitor 6 is discharged compulsorily by a time constant T via a pull-down resistor 10. Therefore, a control voltage Vs can be decreased to around 0V when the microcomputer is reset, which surely prevents the dead lock of the frequency divider 7 from occurring. Also, such state where the dead lock occurs due to infeasibility to follow up the oscillation clock of an oscillation frequency of extremely high level by the frequency divider 7 when the microcomputer is being operated normally can be surely released even when it occurs. |
