发明名称 |
PROCESSOR AND METHOD FOR DATA PROCESSING |
摘要 |
PURPOSE:To provide the data processor and data processing method which eliminate the overhead of a process for branch condition execution in arithmetic of data with different bit width and also reduces instruction code allocation to the same function. CONSTITUTION:The data processor is equipped with an instruction decoding part 103 which decodes instructions, a computing element 104 which performs the arithmetic of N(N: integer)-bit width data according to the instruction decoding result, plural flag groups 3 and 4 which include flags set corresponding to the different bit width data on the basis of the arithmetic result obtained by the computing element 104, selectors which select a specific flag group between the flag groups 3 and 4 according to the indication of a conditional branch instruction, and a branch judgement part 7 which judges whether or not the branch conditions is met by referring to the selected flag group. |
申请公布号 |
JPH06337783(A) |
申请公布日期 |
1994.12.06 |
申请号 |
JP19930129528 |
申请日期 |
1993.05.31 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
KAMIYAMA YUJI;SUZUKI MASATO;MIYAJI SHINYA |
分类号 |
G06F7/00;G06F9/302;G06F9/32 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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