发明名称 Block erasable nonvolatile memory device
摘要 In response to a plurality of address signal input from the outside in sequence, an erase information inputting section controls an erase information holding section corresponding to the batch erase block to be erased so as to hold an erase information data. By repeating this operation in sequence, the erase information data are stored in the erase information holding sections corresponding to the plural batch erase blocks to be erased. Successively, on the basis of the erase information data stored in the erase information holding sections, block erasing sections are activated to erase all the nonvolatile memory cells of each of the corresponding blocks where the erase information data are held. As a result, the erasure operation is achieved for all the batch erase blocks corresponding to the erase information holding sections in each of which the erase information data is held, so that a plurality of batch erase blocks can be erased simulataneously, thus reducing the erasure time, as compared with the prior art memory device.
申请公布号 US5371702(A) 申请公布日期 1994.12.06
申请号 US19930027489 申请日期 1993.03.05
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAKAI, HIROTO;KATO, HIDEO;TOKUSHIGE, KAORU;ASANO, MASAMICHI;KANAZAWA, KAZUHISA;YAMAMURA, TOSHIO
分类号 G11C16/16;(IPC1-7):G11C11/34;G11C7/00 主分类号 G11C16/16
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