| 摘要 |
The input/output interruption control system comprises a plurality of instruction processors, a plurality of virtual machines, a control program for activation and control of the virtual machines, an input/output processor which activates input/output operation, and a memory (4) for interruption information storing. The instruction processor further comprises registers (53, 63) to store identifiers to identify the virtual machine currently in operation, an interruption acceptance (52, 62) to accept input/output completion interruption requests for the virtual machine currently in operation, and an interruption check (54, 64) which recognizes the existence of an input/output completion interruption request for the virtual machine in operation and activates the input/output completion interruption processing, and a notification bus (5) to send the input/output completion interruption request and the identifier of the specific virtual machine to other instruction processor when the specific virtual machine is activated. Such interruption acceptance (52, 62) of the instruction processors further comprises a input (90) to forcibly activate the interruption check (54, 64) means upon acceptance of an input/output completion interruption and identifier for the specific virtual machine from other instruction processor.
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