发明名称 FAULT DETECTING SYSTEM FOR SPEED CHECKER
摘要 PURPOSE:To judge whether it is normal or abnormal by inputting relay contact information to a microcomputer, simultaneously inputting a speed limit signal and a train speed, and checking to turn ON a check output relay under a condition of the speed signal >= the train speed and to turn OFF a check output relay under a condition of a limit speed < the train speed. CONSTITUTION:Speed limit signals 1a, 1b are input to a microcomputer 4, and a signal discriminator 5 decides a limit speed. On the other hand, a train speed is input to an LSi 9 after it is waveform shaped by a waveform shaper 8a. A pattern frequency generator 10 generates a limit speed pattern frequency VP, and inputs it to a frequency comparator 12. The other input of this comparator is a train speed frequency VV corrected for a wheel diameter, and frequencies of the both are compared. The comparator 12 outputs an AC output in the case of VP>=VV, and a check output relay (BR) is turned ON via an AC amplifier 13. In the case of VP<VV, it outputs a DC output and the BR is turned OFF.
申请公布号 JPH06335103(A) 申请公布日期 1994.12.02
申请号 JP19930119522 申请日期 1993.05.21
申请人 HITACHI LTD;HITACHI TECHNO ENG CO LTD 发明人 SHIMIZU TOMOYUKI;NAKA YOSHITAKA;TANAKA MITSUHIKO;SEKINO SHINICHI
分类号 B60L3/08;G01P3/42;(IPC1-7):B60L3/08 主分类号 B60L3/08
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