| 摘要 |
<p>PURPOSE:To reduce a circuit scale by performing a data processing by a single buffer by successively storing plural data which a frame pulse is subjected to serial/parallel (S/P) conversion into the buffer, then successively reading them, discriminating the existence of the frame pulse and subjecting the pulse to P/S conversion. CONSTITUTION:An S/P conversion part 1 converts the frame pulse contained in input S data into plural P data and inputs them in an OR circuit 2. The circuit 2 takes a condition whether which frame the frame pulse exists in for P data and a single buffer 3 successively stores this data. As for the data successively read from the buffer 3, a P/S converter 4 discriminates the condition when the converter 1 performs the S/P conversion, selects data and performs P/S conversion for data. This, the parallel processing of data such as a frame pulse becomes possible to be processed by a single buffer without using plural buffers to reduce memory capacity is reduced and a circuit scale.</p> |
