| 摘要 |
<p>PURPOSE:To transfer video data to a VRAM at a high speed and to display smooth moving images. CONSTITUTION:A multipler 7 multiplies an addition address value stored in an addition address value storage part 3 and a count value in a vertical direction outputted from a vertical counter part 4, a first adder 8 adds an offset address stored in an offset address storage part 2 beforehand and the multiplied result of the multipler 7 and a second adder 9 adds the added result of the first adder 8 and the count value of a horizontal counter part 5. A third adder 10 adds the added result of the second adder 9 and the area starting addresses of respective RGB components stored in three area starting address storage parts 6R, 6G and 6B and the output AD3 of the third adder 10 becomes an access address at the time of DMA transfer. Since the address at the time of transfer can be calculated by simple arithmetic operations inside a DMA controller 34 in such a manner, the DMA transfer can be performed at a high speed.</p> |
