| 摘要 |
<p>PURPOSE:To provide a microcomputer capable of improving the throughput of an information processing means and improving the responsiveness of an external device. CONSTITUTION:When a CPU part 11 i.s accessing an internal ROM part 13 or an internal RAM part 14, when a bus using right request signal BREQ is inputted, a bus release confirmation signal BACK is outputted without interposing the CPU 11, also an external bus side is turned to a high impedance state by a bus interface circuit 15 and an external bus is released. As a result, the CPU 11 can use an internal bus and continue the operations of its own and on the other hand, the external device can perform the operations using the external bus.</p> |
