| 摘要 |
<p>The present invention relates to a dynamic memory comprising a plurality of cells (MN, MN', C) with capacitances (C), which are connected by columns to bit lines (BL, BL') and by rows to selection lines (RW, RW'). One even row and one odd row contain reference cells (MND, MND', C), the cells of the other rows being memory cells. According to the invention, the capacitances (C) of the reference cells are equal to the capacitances of the memory cells, and means are provided in order, before reading a memory cell from an even row, to connect the selection line (RWD, RWD') of the odd row of reference cells to an element (REF) having the same capacitance as a selection line, but precharged to the state opposite that of the selection line of the odd row of reference cells. <IMAGE></p> |
