| 摘要 |
PURPOSE: To eliminate incorrect end edges from input signals and to transmit appropriate signals by providing a circuit for sensing the leading edge and trailing edge of signals and programmably filtering the edges. CONSTITUTION: Capacitors 128 and 134 are used for control signals 120 and 122, and delay in a circuit 100 is decided. Then, the signals on a node 110 are pulled up by an inverter 124. For instance, when only the signals 120 are active, whatever kind a value the combination value of a CMOS switch 126 and the capacitor 128 is, the rise time will be delayed. Then, through the operation of an inverter 112, the leading edge requires a long time for discharging the capacitors 128 and 134, and the trailing edge quickly discharges the capacitors 128 and 134. Thus, the signals on the node 110 are not provided with glitches at the time of output, even when glitches are provided at the time of input and the appropriate signals are transmitted. |
