发明名称 |
MULTIPLEX SYNCHRONIZATION CIRCUIT |
摘要 |
<p>PURPOSE:To provide the multiplex synchronization circuit controlling a system for each function by dividing the synchronization circuit including complicated state transition diagram having lots of processing items with respect to the multiplex synchronization circuit in the state transition diagram of a logic circuit. CONSTITUTION:The synchronization circuit is a circuit realized by a state transition diagram comprising lots of processing procedures and is provided with a 1st synchronization means 11 processing state transition of inputted system information and a 2nd synchronization means 12 processing the state transition of the processing function and the 1st synchronization means 11 encodes a function obtained from system information to provide an output and the 2nd synchronization means 12 provides an output of a processing function from functions outputted through coding.</p> |
申请公布号 |
JPH06324724(A) |
申请公布日期 |
1994.11.25 |
申请号 |
JP19930109095 |
申请日期 |
1993.05.11 |
申请人 |
FUJITSU LTD;FUJITSU KYUSHU COMMUN SYST CO LTD |
发明人 |
KADOZONO HIROYUKI |
分类号 |
G05B19/05;G11B15/10;(IPC1-7):G05B19/05 |
主分类号 |
G05B19/05 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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