SYSTEM AND METHOD FOR TESTING POWER CONSUMPTION OF INTEGRATED CIRCUIT

摘要

A system and method for testing the power consumption of an integrated circuit. The system comprises: an upper computer (110), a power consumption test plate (120) and an integrated circuit test plate (130), wherein the upper computer (110) is configured to set voltage data of the tested integrated circuit and data of a plurality of working scenarios; the power consumption test plate (120) is configured to output the voltage to the integrated circuit test plate (130) according to the voltage data and output the data of the plurality of working scenarios to the integrated circuit test plate (130), and is further configured to synchronously collect current data of the tested integrated circuit under each of the working scenarios and calculate power consumption data of the tested integrated circuit under each of the working scenarios; and the integrated circuit test plate (130) is configured to successively test each working scenario according to the data of the plurality of working scenarios, and output data of each of the working scenarios to the power consumption test plate (120) at a moment when each of the working scenarios starts.