| 摘要 |
PURPOSE:To decrease the number of gate passing stages of input data in the barrel shifter, and to attain a high speed operation. CONSTITUTION:Multiplexers San, Sbn of four inputs-one output are used for the fundamental cell the barrel shifter, each of them is constituted so as to be in parallel to each other, and also, in a multistage, and an output of an n-th stage is connected to a '0' bit shifting part of an input of an (n)+1-th stage, a1X4<n> bit shifting part, a2X4<n> bit shifting part, and a 3X4<n> bit shifting part respectively. In accordance with outputs of decoders 1a, 1b, one selected input signal in four inputs of each multiplexer San, Sbn in outputted. The barrel shifter which is constituted of two stages and has a bit shifting function is constituted. In such a way, compared with a conventional barrel shifter using a multiplexer of two inputs-one output, the number of gate passing stages of input data can be decreased. |
