| 摘要 |
The outputs of several input amplifiers (E1 to En) and of a load amplifier (Lv) are combined and connected through a buffer stage B, connected thereto, to the inverting input (-) of the load amplifier (Lv). The input amplifiers (E1 to En) and the load amplifier (Lv) each consist of a plurality of individual cells Z and each individual cell Z consists of a transconductance amplifier. The output current of the constant-current source of each cell may be switched on and off by a transistor. Individual cells within the amplifier may be switched on and off by a bus system (AD) to which individual address decoders (AK) are connected, according to control signals on the address bus (AD), so that the amplifying performance of the whole arrangement can be varied. |
